From d183d8c772b3029b0a5fbb219d7cfe27615004d9 Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Thu, 30 Aug 2018 21:36:48 +0000 Subject: [WebAssembly] SIMD loads and stores Summary: Reuse the patterns from WebAssemblyInstrMemory.td. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51383 llvm-svn: 341127 --- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h') diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h index 4ca921481dc..8477bdc3618 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h @@ -305,6 +305,31 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) { case WebAssembly::ATOMIC_WAIT_I64: case WebAssembly::ATOMIC_WAIT_I64_S: return 3; + case WebAssembly::LOAD_v16i8: + case WebAssembly::LOAD_v16i8_S: + case WebAssembly::LOAD_v8i16: + case WebAssembly::LOAD_v8i16_S: + case WebAssembly::LOAD_v4i32: + case WebAssembly::LOAD_v4i32_S: + case WebAssembly::LOAD_v2i64: + case WebAssembly::LOAD_v2i64_S: + case WebAssembly::LOAD_v4f32: + case WebAssembly::LOAD_v4f32_S: + case WebAssembly::LOAD_v2f64: + case WebAssembly::LOAD_v2f64_S: + case WebAssembly::STORE_v16i8: + case WebAssembly::STORE_v16i8_S: + case WebAssembly::STORE_v8i16: + case WebAssembly::STORE_v8i16_S: + case WebAssembly::STORE_v4i32: + case WebAssembly::STORE_v4i32_S: + case WebAssembly::STORE_v2i64: + case WebAssembly::STORE_v2i64_S: + case WebAssembly::STORE_v4f32: + case WebAssembly::STORE_v4f32_S: + case WebAssembly::STORE_v2f64: + case WebAssembly::STORE_v2f64_S: + return 4; default: llvm_unreachable("Only loads and stores have p2align values"); } -- cgit v1.2.3