From 7789b0828aa769b56329bf229f7231b2fa87606b Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 30 Sep 2013 08:48:38 +0000 Subject: [SystemZ] Rename 32-bit GPR registers I'm about to add support for high-word operations, so it seemed better for the low-word registers to have names like R0L rather than R0W. No behavioral change intended. llvm-svn: 191655 --- llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp') diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp index 8ce6d6ab448..841f0ae0269 100644 --- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp @@ -42,13 +42,13 @@ SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const { if (TFI->hasFP(MF)) { // R11D is the frame pointer. Reserve all aliases. Reserved.set(SystemZ::R11D); - Reserved.set(SystemZ::R11W); + Reserved.set(SystemZ::R11L); Reserved.set(SystemZ::R10Q); } // R15D is the stack pointer. Reserve all aliases. Reserved.set(SystemZ::R15D); - Reserved.set(SystemZ::R15W); + Reserved.set(SystemZ::R15L); Reserved.set(SystemZ::R14Q); return Reserved; } -- cgit v1.2.3