From d1aa1638c605e5d8b5c7351db4063b08fd27640b Mon Sep 17 00:00:00 2001 From: Jim Laskey Date: Tue, 28 Mar 2006 13:48:33 +0000 Subject: Expose base register for DwarfWriter. Refactor code accordingly. llvm-svn: 27225 --- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 11 ++--------- llvm/lib/Target/Sparc/SparcRegisterInfo.h | 4 ++-- 2 files changed, 4 insertions(+), 11 deletions(-) (limited to 'llvm/lib/Target/Sparc') diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp index cbeb87fa54e..44f3adce043 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -200,15 +200,8 @@ void SparcRegisterInfo::emitEpilogue(MachineFunction &MF, BuildMI(MBB, MBBI, SP::RESTORErr, 2, SP::G0).addReg(SP::G0).addReg(SP::G0); } -void SparcRegisterInfo::getLocation(MachineFunction &MF, unsigned Index, - MachineLocation &ML) const { - assert(0 && "Needs to be defined for target"); - MachineFrameInfo *MFI = MF.getFrameInfo(); - - // FIXME - Needs to handle register variables. - // FIXME - Faking that llvm number is same as gcc numbering. - ML.set(getDwarfRegNum(SP::G1), - MFI->getObjectOffset(Index) + MFI->getStackSize()); +unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const { + return getDwarfRegNum(SP::G1); } #include "SparcGenRegisterInfo.inc" diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.h b/llvm/lib/Target/Sparc/SparcRegisterInfo.h index 53d3e6fdba0..d36b3c1eed0 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.h +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.h @@ -57,8 +57,8 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo { void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; - void getLocation(MachineFunction &MF, unsigned Index, - MachineLocation &ML) const; + // Debug information queries. + unsigned getFrameRegister(MachineFunction &MF) const; }; } // end namespace llvm -- cgit v1.2.3