From c67b3ffba743e8de1c46b5363bf9801e20da5744 Mon Sep 17 00:00:00 2001 From: Daniel Cederman Date: Fri, 20 Apr 2018 07:47:12 +0000 Subject: [Sparc] Use synthetic instruction clr to zero register instead of sethi Using `clr reg`/`mov %g0, reg`/`or %g0, %g0, reg` to zero a register looks much better than `sethi 0, reg`. Reviewers: jyknight, venkatra Reviewed By: jyknight Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D45810 llvm-svn: 330396 --- llvm/lib/Target/Sparc/SparcInstrInfo.td | 3 +++ 1 file changed, 3 insertions(+) (limited to 'llvm/lib/Target/Sparc') diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td index 08bccbde0bd..ad00c83171d 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.td +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td @@ -1599,6 +1599,9 @@ let Predicates = [HasV9] in { // Non-Instruction Patterns //===----------------------------------------------------------------------===// +// Zero immediate. +def : Pat<(i32 0), + (ORrr (i32 G0), (i32 G0))>; // Small immediates. def : Pat<(i32 simm13:$val), (ORri (i32 G0), imm:$val)>; -- cgit v1.2.3