From 4cf012d84516b84056b8668c8502d03ef94b8cda Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Tue, 15 Jul 2003 21:26:49 +0000 Subject: Encode predict = 1 by default, because the Sparc assembler does this. llvm-svn: 7181 --- llvm/lib/Target/Sparc/SparcV9_F2.td | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'llvm/lib/Target/Sparc') diff --git a/llvm/lib/Target/Sparc/SparcV9_F2.td b/llvm/lib/Target/Sparc/SparcV9_F2.td index 72bcb0903c9..e84146a461f 100644 --- a/llvm/lib/Target/Sparc/SparcV9_F2.td +++ b/llvm/lib/Target/Sparc/SparcV9_F2.td @@ -38,21 +38,21 @@ class F2_2 cond, string name> : F2_br { // Format 2.2 instructions class F2_3 cond, string name> : F2_br { // Format 2.3 instructions bits<2> cc; bits<19> disp; - bit predict; + bit predict = 1; bit annul; set Name = name; set Inst{29} = annul; set Inst{28-25} = cond; set Inst{21-20} = cc; - set Inst{19} = predict; + set Inst{19} = 1; // predict; set Inst{18-0} = disp; } class F2_4 rcond, string name> : F2_br { // Format 2.4 instructions bits<5> rs1; bits<16> disp; - bit predict; + bit predict = 1; bit annul; set Name = name; @@ -60,7 +60,7 @@ class F2_4 rcond, string name> : F2_br { // Format 2.4 instructions set Inst{28} = 0; set Inst{27-25} = rcond; set Inst{21-20} = disp{15-14}; - set Inst{19} = predict; + set Inst{19} = 1; // predict; set Inst{18-14} = rs1; set Inst{13-0 } = disp{13-0}; } -- cgit v1.2.3