From e3f652973e6e4fb7074b0bdc2291493e6cb8fae5 Mon Sep 17 00:00:00 2001 From: Peter Collingbourne Date: Fri, 18 May 2018 19:46:24 +0000 Subject: Support: Simplify endian stream interface. NFCI. Provide some free functions to reduce verbosity of endian-writing a single value, and replace the endianness template parameter with a field. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47032 llvm-svn: 332757 --- llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp') diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp index 684f66970db..647be159a15 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp @@ -98,14 +98,9 @@ void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, computeAvailableFeatures(STI.getFeatureBits())); unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); - - if (Ctx.getAsmInfo()->isLittleEndian()) { - // Output the bits in little-endian byte order. - support::endian::Writer(OS).write(Bits); - } else { - // Output the bits in big-endian byte order. - support::endian::Writer(OS).write(Bits); - } + support::endian::write(OS, Bits, + Ctx.getAsmInfo()->isLittleEndian() ? support::little + : support::big); unsigned tlsOpNo = 0; switch (MI.getOpcode()) { default: break; -- cgit v1.2.3