From b0799dda77c6b75526e1415331e2a9656abd6f95 Mon Sep 17 00:00:00 2001 From: Ana Pazos Date: Thu, 13 Sep 2018 18:21:19 +0000 Subject: [RISCV] Fix decoding of invalid instruction with C extension enabled. Summary: The illegal instruction 0x00 0x00 is being wrongly decoded as c.addi4spn with 0 immediate. The invalid instruction 0x01 0x61 is being wrongly decoded as c.addi16sp with 0 immediate. This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer for the RISC-V assembly language. Reviewers: asb Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb Differential Revision: https://reviews.llvm.org/D51815 llvm-svn: 342159 --- .../Target/RISCV/Disassembler/RISCVDisassembler.cpp | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp') diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 69afa4b9831..d5b8b389ae3 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -211,6 +211,15 @@ static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, return MCDisassembler::Success; } +template +static DecodeStatus decodeUImmNonZeroOperand(MCInst &Inst, uint64_t Imm, + int64_t Address, + const void *Decoder) { + if (Imm == 0) + return MCDisassembler::Fail; + return decodeUImmOperand(Inst, Imm, Address, Decoder); +} + template static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) { @@ -221,6 +230,15 @@ static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, return MCDisassembler::Success; } +template +static DecodeStatus decodeSImmNonZeroOperand(MCInst &Inst, uint64_t Imm, + int64_t Address, + const void *Decoder) { + if (Imm == 0) + return MCDisassembler::Fail; + return decodeSImmOperand(Inst, Imm, Address, Decoder); +} + template static DecodeStatus decodeSImmOperandAndLsl1(MCInst &Inst, uint64_t Imm, int64_t Address, -- cgit v1.2.3