From fae02989b710a97a61d8b7061e35aa8d4a05e585 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 17 Mar 2014 18:58:11 +0000 Subject: R600: Match sign_extend_inreg to BFE instructions llvm-svn: 204072 --- llvm/lib/Target/R600/R600ISelLowering.cpp | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'llvm/lib/Target/R600/R600ISelLowering.cpp') diff --git a/llvm/lib/Target/R600/R600ISelLowering.cpp b/llvm/lib/Target/R600/R600ISelLowering.cpp index 8c737125c85..4d15321fd02 100644 --- a/llvm/lib/Target/R600/R600ISelLowering.cpp +++ b/llvm/lib/Target/R600/R600ISelLowering.cpp @@ -1383,6 +1383,11 @@ SDValue R600TargetLowering::LowerFormalArguments( PointerType *PtrTy = PointerType::get(VT.getTypeForEVT(*DAG.getContext()), AMDGPUAS::CONSTANT_BUFFER_0); + // i64 isn't a legal type, so the register type used ends up as i32, which + // isn't expected here. It attempts to create this sextload, but it ends up + // being invalid. Somehow this seems to work with i64 arguments, but breaks + // for <1 x i64>. + // The first 36 bytes of the input buffer contains information about // thread group and global sizes. SDValue Arg = DAG.getExtLoad(ISD::SEXTLOAD, DL, VT, Chain, -- cgit v1.2.3