From 6a5a4f85d3fc5f9ce8d126a03435c834dd3c4a0c Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 8 Nov 2006 02:13:12 +0000 Subject: correct the (currently unused) pattern for lwzu. llvm-svn: 31535 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/PowerPC') diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index e072e7e024e..cfe103de878 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -197,6 +197,9 @@ class isDOT { bit RC = 1; } +class RegConstraint { + string Constraints = C; +} //===----------------------------------------------------------------------===// @@ -418,10 +421,13 @@ def LHZ : DForm_1<40, (ops GPRC:$rD, memri:$src), def LWZ : DForm_1<32, (ops GPRC:$rD, memri:$src), "lwz $rD, $src", LdStGeneral, [(set GPRC:$rD, (load iaddr:$src))]>; -def LWZU : DForm_1<35, (ops GPRC:$rD, s16imm:$disp, GPRC:$rA), + +def LWZU : DForm_1<33, (ops GPRC:$rD, GPRC:$rA_result, i32imm:$disp, GPRC:$rA), "lwzu $rD, $disp($rA)", LdStGeneral, - []>; + []>, RegConstraint<"$rA = $rA_result">; } + + let PPC970_Unit = 1 in { // FXU Operations. def ADDI : DForm_2<14, (ops GPRC:$rD, GPRC:$rA, s16imm:$imm), "addi $rD, $rA, $imm", IntGeneral, -- cgit v1.2.3