From e42ac21499c103a4b1052e759618ecbd35207d6c Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Thu, 31 Aug 2017 05:56:16 +0000 Subject: Temporarily revert "Update branch coalescing to be a PowerPC specific pass" From comments and code review it wasn't intended to be enabled by default yet. This reverts commit r311588. llvm-svn: 312214 --- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 8 -------- 1 file changed, 8 deletions(-) (limited to 'llvm/lib/Target/PowerPC/PPCTargetMachine.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index 18426bdb6bf..bc5d32b37fd 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -40,10 +40,6 @@ using namespace llvm; - -static cl::opt - DisableBranchCoalescing("disable-ppc-branch-coalesce", cl::Hidden, - cl::desc("disable coalescing of duplicate branches for PPC")); static cl:: opt DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, cl::desc("Disable CTR loops for PPC")); @@ -382,10 +378,6 @@ bool PPCPassConfig::addInstSelector() { } void PPCPassConfig::addMachineSSAOptimization() { - // PPCBranchCoalescingPass need to be done before machine sinking - // since it merges empty blocks. - if (!DisableBranchCoalescing && getOptLevel() != CodeGenOpt::None) - addPass(createPPCBranchCoalescingPass()); TargetPassConfig::addMachineSSAOptimization(); // For little endian, remove where possible the vector swap instructions // introduced at code generation to normalize vector element order. -- cgit v1.2.3