From 290376dd78b6374d3a7e400fd0ff55632a94562e Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Mon, 1 Apr 2013 15:58:15 +0000 Subject: Add the PPC popcntw instruction The popcntw instruction is available whenever the popcntd instruction is available, and performs a separate popcnt on the lower and upper 32-bits. Ignoring the high-order count, this can be used for the 32-bit input case (saving on the explicit zero extension otherwise required to use popcntd). llvm-svn: 178470 --- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'llvm/lib/Target/PowerPC/PPCInstr64Bit.td') diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index 6cc2260de54..61702cf916a 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -468,6 +468,13 @@ def POPCNTD : XForm_11<31, 506, (outs G8RC:$rA), (ins G8RC:$rS), "popcntd $rA, $rS", IntGeneral, [(set i64:$rA, (ctpop i64:$rS))]>; +// popcntw also does a population count on the high 32 bits (storing the +// results in the high 32-bits of the output). We'll ignore that here (which is +// safe because we never separately use the high part of the 64-bit registers). +def POPCNTW : XForm_11<31, 378, (outs GPRC:$rA), (ins GPRC:$rS), + "popcntw $rA, $rS", IntGeneral, + [(set i32:$rA, (ctpop i32:$rS))]>; + def DIVD : XOForm_1<31, 489, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), "divd $rT, $rA, $rB", IntDivD, [(set i64:$rT, (sdiv i64:$rA, i64:$rB))]>, isPPC64, -- cgit v1.2.3