From 322e41a9144493600bf4474132a36f015231379f Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Sun, 1 Apr 2012 20:08:17 +0000 Subject: Enable prefetch generation on PPC64. llvm-svn: 153851 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 00f2dcc8dbf..96b7074aa02 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -389,6 +389,9 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom); } + if (TM.getSubtarget().has64BitSupport()) + setOperationAction(ISD::PREFETCH, MVT::Other, Legal); + setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand); -- cgit v1.2.3