From 5d6cb604def52a589aa7d34b18e68c5c2167a798 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 28 Oct 2005 20:32:44 +0000 Subject: add support for branch on ordered/unordered. llvm-svn: 24067 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index d078bdcd5f0..3d9cd8dc3fb 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -489,6 +489,15 @@ static unsigned getBCCForSetCC(ISD::CondCode CC) { case ISD::SETGT: return PPC::BGT; case ISD::SETUGE: case ISD::SETGE: return PPC::BGE; + + case ISD::SETO: return PPC::BUN; + case ISD::SETUO: return PPC::BNU; + case ISD::SETOEQ: + case ISD::SETOGT: + case ISD::SETOGE: + case ISD::SETOLT: + case ISD::SETOLE: + case ISD::SETONE: assert(0 && "Unknown condition!"); abort(); } return 0; } @@ -509,6 +518,14 @@ static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool& Inv) { case ISD::SETLE: Inv = true; return 1; case ISD::SETEQ: Inv = false; return 2; case ISD::SETNE: Inv = true; return 2; + case ISD::SETO: Inv = true; return 3; + case ISD::SETUO: Inv = false; return 3; + case ISD::SETOEQ: + case ISD::SETOGT: + case ISD::SETOGE: + case ISD::SETOLT: + case ISD::SETOLE: + case ISD::SETONE: assert(0 && "Unknown condition!"); abort(); } return 0; } -- cgit v1.2.3