From 47a7d6fafec81534ac060ef4be0f51e5dc892460 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 30 Jan 2008 00:15:11 +0000 Subject: Factor the addressing mode and the load/store VT out of LoadSDNode and StoreSDNode into their common base class LSBaseSDNode. Member functions getLoadedVT and getStoredVT are replaced with the common getMemoryVT to simplify code that will handle both loads and stores. llvm-svn: 46538 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index df1d9b5d25b..09fef251964 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -921,7 +921,7 @@ SDNode *PPCDAGToDAGISel::Select(SDOperand Op) { case ISD::LOAD: { // Handle preincrement loads. LoadSDNode *LD = cast(Op); - MVT::ValueType LoadedVT = LD->getLoadedVT(); + MVT::ValueType LoadedVT = LD->getMemoryVT(); // Normal loads are handled by code generated from the .td file. if (LD->getAddressingMode() != ISD::PRE_INC) -- cgit v1.2.3