From f3d06c64176e726a1af3a40b51fffcd8d8c5f878 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 26 Aug 2005 00:52:45 +0000 Subject: add initial support for converting select_cc -> fsel in the legalizer instead of in the backend. This currently handles fsel cases with registers, but doesn't have the 0.0 and -0.0 optimization enabled yet. Once this is finished, special hack for fp immediates can go away. llvm-svn: 23075 --- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp') diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp index 07529c7e017..102b4b3845d 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp @@ -829,6 +829,12 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { default: Node->dump(); std::cerr << '\n'; assert(0 && "Node not handled!\n"); + case ISD::BUILTIN_OP_END+PPC::FSEL: + Tmp1 = SelectExpr(N.getOperand(0)); + Tmp2 = SelectExpr(N.getOperand(1)); + Tmp3 = SelectExpr(N.getOperand(2)); + BuildMI(BB, PPC::FSEL, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); + return Result; case ISD::UNDEF: if (Node->getValueType(0) == MVT::i32) BuildMI(BB, PPC::IMPLICIT_DEF_GPR, 0, Result); -- cgit v1.2.3