From ce400dac21ac4f44d54a7042bc0d6c132cfdef39 Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Fri, 19 Aug 2005 03:42:28 +0000 Subject: Fix a bug where we were passing the wrong number of arguments to an instruction. llvm-svn: 22901 --- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp') diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp index 3ca7cd6c610..caf6b3981d0 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp @@ -469,7 +469,10 @@ void ISel::MoveCRtoGPR(unsigned CCReg, ISD::CondCode CC, unsigned Result){ BuildMI(BB, PPC::MCRF, 1, PPC::CR7).addReg(CCReg); bool GPOpt = TLI.getTargetMachine().getSubtarget().isGigaProcessor(); - BuildMI(BB, GPOpt ? PPC::MFOCRF : PPC::MFCR, 1, IntCR).addReg(PPC::CR7); + if (GPOpt) + BuildMI(BB, PPC::MFOCRF, 1, IntCR).addReg(PPC::CR7); + else + BuildMI(BB, PPC::MFCR, 0, IntCR); if (Inv) { unsigned Tmp1 = MakeIntReg(); BuildMI(BB, PPC::RLWINM, 4, Tmp1).addReg(IntCR).addImm(32-(3-Idx)) -- cgit v1.2.3