From 63aa852a84fa61247c84a74d083f036fd06e352b Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Tue, 26 Mar 2013 10:53:27 +0000 Subject: PowerPC: Simplify BLR pattern. The BLR pattern cannot be recognized by the asm parser in its current form. This complexity is due to an apparent attempt to enable conditional BLR variants. However, none of those can ever be generated by current code; the pattern is only ever created using the default "pred" operand. To simplify the pattern and allow it to be recognized by the parser, this commit removes those attempts at conditional BLR support. When we later come back to actually add real conditional BLR, this should probably be done via a fully generic conditional branch pattern. No change in generated code. llvm-svn: 178002 --- llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h | 1 - 1 file changed, 1 deletion(-) (limited to 'llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h') diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h index b0680fbb8c6..ad2b0181281 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h @@ -25,7 +25,6 @@ namespace llvm { namespace PPC { /// Predicate - These are "(BI << 5) | BO" for various predicates. enum Predicate { - PRED_ALWAYS = (0 << 5) | 20, PRED_LT = (0 << 5) | 12, PRED_LE = (1 << 5) | 4, PRED_EQ = (2 << 5) | 12, -- cgit v1.2.3