From cf0e06d375d8524314950805cddf189eb775a84c Mon Sep 17 00:00:00 2001 From: Simon Dardis Date: Fri, 24 Feb 2017 16:27:45 +0000 Subject: [mips] Fix atomic compare and swap at O0. Similar to PR/25526, fast-regalloc introduces spills at the end of basic blocks. When this occurs in between an ll and sc, the store can cause the atomic sequence to fail. This patch fixes the issue by introducing more pseudos to represent atomic operations and moving their lowering to after the expansion of postRA pseudos. This resolves PR/32020. Thanks to James Cowgill for reporting the issue! Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D30257 llvm-svn: 296132 --- llvm/lib/Target/Mips/MipsTargetMachine.cpp | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp') diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index a45a9c4b41c..d08e3b9f941 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -213,6 +213,7 @@ public: bool addInstSelector() override; void addPreEmitPass() override; void addPreRegAlloc() override; + void addPreSched2() override; }; } // end anonymous namespace @@ -270,3 +271,7 @@ void MipsPassConfig::addPreEmitPass() { addPass(createMipsLongBranchPass(TM)); addPass(createMipsConstantIslandPass()); } + +void MipsPassConfig::addPreSched2() { + addPass(createMipsExpandPseudoPass()); +} -- cgit v1.2.3