From ce09d07824b130fa1a6d424e2f52ee3377073ef5 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Wed, 28 Aug 2013 12:14:50 +0000 Subject: [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes, are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as a branch/mov sequence to evaluate to 0 or 1. Note: The resulting code is sub-optimal since it doesnt seem to be possible to feed the result of an intrinsic directly into a brcond. At the moment it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily evaluates the boolean twice. llvm-svn: 189478 --- llvm/lib/Target/Mips/MipsMSAInstrFormats.td | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'llvm/lib/Target/Mips/MipsMSAInstrFormats.td') diff --git a/llvm/lib/Target/Mips/MipsMSAInstrFormats.td b/llvm/lib/Target/Mips/MipsMSAInstrFormats.td index f337f9d8fff..b0116747192 100644 --- a/llvm/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/llvm/lib/Target/Mips/MipsMSAInstrFormats.td @@ -119,3 +119,8 @@ class MSA_VEC_FMT major, bits<6> minor>: MSAInst { let Inst{25-21} = major; let Inst{5-0} = minor; } + +class MSA_VECS10_FMT major, bits<6> minor>: MSAInst { + let Inst{25-21} = major; + let Inst{5-0} = minor; +} -- cgit v1.2.3