From f649043aa533ef2b4aedaf7151018f331173ae4c Mon Sep 17 00:00:00 2001 From: Jack Carter Date: Mon, 16 Jul 2012 15:14:51 +0000 Subject: Doubleword Shift Left Logical Plus 32 Mips shift instructions DSLL, DSRL and DSRA are transformed into DSLL32, DSRL32 and DSRA32 respectively if the shift amount is between 32 and 63 Here is a description of DSLL: Purpose: Doubleword Shift Left Logical Plus 32 To execute a left-shift of a doubleword by a fixed amount--32 to 63 bits Description: GPR[rd] <- GPR[rt] << (sa+32) The 64-bit doubleword contents of GPR rt are shifted left, inserting zeros into the emptied bits; the result is placed in GPR rd. The bit-shift amount in the range 0 to 31 is specified by sa. This patch implements the direct object output of these instructions. llvm-svn: 160277 --- llvm/lib/Target/Mips/MipsMCInstLower.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'llvm/lib/Target/Mips/MipsMCInstLower.h') diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.h b/llvm/lib/Target/Mips/MipsMCInstLower.h index 314420a1704..0abb996a687 100644 --- a/llvm/lib/Target/Mips/MipsMCInstLower.h +++ b/llvm/lib/Target/Mips/MipsMCInstLower.h @@ -33,6 +33,8 @@ public: MipsMCInstLower(MipsAsmPrinter &asmprinter); void Initialize(Mangler *mang, MCContext *C); void Lower(const MachineInstr *MI, MCInst &OutMI) const; + void LowerLargeShift(const MachineInstr *MI, MCInst &Inst, int64_t Shift); + private: MCOperand LowerSymbolOperand(const MachineOperand &MO, MachineOperandType MOTy, unsigned Offset) const; -- cgit v1.2.3