From a73d8fe2ad005fd5650510ce6d4c54249adae53a Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Tue, 24 Mar 2015 11:26:34 +0000 Subject: [mips] Distinguish 'R', 'ZC', and 'm' inline assembly memory constraint. Summary: Previous behaviour of 'R' and 'm' has been preserved for now. They will be improved in subsequent commits. The offset permitted by ZC varies according to the subtarget since it is intended to match the restrictions of the pref, ll, and sc instructions. The restrictions on these instructions are: * For microMIPS: 12-bit signed offset. * For Mips32r6/Mips64r6: 9-bit signed offset. * Otherwise: 16-bit signed offset. Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8414 llvm-svn: 233063 --- llvm/lib/Target/Mips/MipsISelLowering.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'llvm/lib/Target/Mips/MipsISelLowering.cpp') diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 2eebd76ce24..e4bae03ebd4 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3173,6 +3173,10 @@ getConstraintType(const std::string &Constraint) const return C_Memory; } } + + if (Constraint == "ZC") + return C_Memory; + return TargetLowering::getConstraintType(Constraint); } -- cgit v1.2.3