From 0ab5a02579db6fa3a72f6bf11725f91efd71b498 Mon Sep 17 00:00:00 2001
From: Kalle Raiskila <kalle.raiskila@nokia.com>
Date: Mon, 21 Jun 2010 15:08:16 +0000
Subject: Mark the SPU 'lr' instruction to never have side effects. This allows
 the fast regiser allocator to remove redundant register moves. Update a set
 of tests that depend on the register allocator to be linear scan.

llvm-svn: 106420
---
 llvm/lib/Target/CellSPU/SPUInstrInfo.cpp | 2 --
 1 file changed, 2 deletions(-)

(limited to 'llvm/lib/Target/CellSPU')

diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
index 877d1c5dca3..9dfe01476c8 100644
--- a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -164,11 +164,9 @@ SPUInstrInfo::isMoveInstr(const MachineInstr& MI,
            MI.getOperand(0).isReg() &&
            MI.getOperand(1).isReg() &&
            "invalid SPU OR<type>_<vec> or LR instruction!");
-    if (MI.getOperand(0).getReg() == MI.getOperand(1).getReg()) {
       sourceReg = MI.getOperand(1).getReg();
       destReg = MI.getOperand(0).getReg();
       return true;
-    }
     break;
   }
   case SPU::ORv16i8:
-- 
cgit v1.2.3