From dd55b1566ba11346bef46062ce1a3c543c0fbbfc Mon Sep 17 00:00:00 2001 From: Andrew Lenharth Date: Fri, 1 Jul 2005 19:12:13 +0000 Subject: simplify call code, remove pseudo ops for div and rem, track more loads and stores llvm-svn: 22322 --- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp') diff --git a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp index f05c1157c29..6cd389833fa 100644 --- a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -31,6 +31,10 @@ #include using namespace llvm; +namespace llvm { + extern cl::opt EnableAlphaLSMark; +} + //These describe LDAx static const int IMM_LOW = -32768; static const int IMM_HIGH = 32767; @@ -50,6 +54,12 @@ static long getLower16(long l) return l - h * IMM_MULT; } +static int getUID() +{ + static int id = 0; + return ++id; +} + AlphaRegisterInfo::AlphaRegisterInfo() : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP) { @@ -68,6 +78,9 @@ AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, unsigned SrcReg, int FrameIdx) const { //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg); + if (EnableAlphaLSMark) + BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1) + .addImm(getUID()); if (getClass(SrcReg) == Alpha::FPRCRegisterClass) BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31); else if (getClass(SrcReg) == Alpha::GPRCRegisterClass) @@ -81,6 +94,9 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx) const{ //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n"; + if (EnableAlphaLSMark) + BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2) + .addImm(getUID()); if (getClass(DestReg) == Alpha::FPRCRegisterClass) BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31); else if (getClass(DestReg) == Alpha::GPRCRegisterClass) -- cgit v1.2.3