From e4c91fc9e8cbd91ee25813c4b3a5938d871b108a Mon Sep 17 00:00:00 2001
From: Andrew Lenharth <andrewl@lenharth.org>
Date: Thu, 6 Oct 2005 16:54:29 +0000
Subject: This is suppose to work now

llvm-svn: 23644
---
 llvm/lib/Target/Alpha/AlphaISelPattern.cpp | 1 -
 1 file changed, 1 deletion(-)

(limited to 'llvm/lib/Target/Alpha/AlphaISelPattern.cpp')

diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
index 557da82d1d6..bb2162b4809 100644
--- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1822,7 +1822,6 @@ void AlphaISel::Select(SDOperand N) {
       } else { //ISD::TRUNCSTORE
         switch(cast<VTSDNode>(Node->getOperand(4))->getVT()) {
         default: assert(0 && "unknown Type in store");
-        case MVT::i1: //FIXME: DAG does not promote this load
         case MVT::i8: Opc = Alpha::STB; break;
         case MVT::i16: Opc = Alpha::STW; break;
         case MVT::i32: Opc = Alpha::STL; break;
-- 
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