From 3ccb1b8cf9077c99e19b4582d8619d7616ad2fd0 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Fri, 22 Jun 2012 02:50:31 +0000 Subject: ARM scheduling fix: compute predicated implicit use properly. Minor drive by fix to cleanup latency computation. Calling getOperandLatency with a deliberately incorrect operand index does not give you the latency you want. llvm-svn: 158959 --- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'llvm/lib/Target/ARM') diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 6bed1371feb..cceb05e4615 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -2998,9 +2998,7 @@ ARMBaseInstrInfo::getOutputLatency(const InstrItineraryData *ItinData, return 1; // If the second MI is predicated, then there is an implicit use dependency. - int Latency = getOperandLatency(ItinData, DefMI, DefIdx, DepMI, - DepMI->getNumOperands()); - return (Latency <= 0) ? 1 : Latency; + return getInstrLatency(ItinData, DefMI); } unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, -- cgit v1.2.3