From 3477f2cea5341034d154e2fd977c9ab470d609b7 Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Thu, 11 Aug 2011 19:00:18 +0000 Subject: Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases. llvm-svn: 137325 --- llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'llvm/lib/Target/ARM') diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 8a85cfade1c..85e48c7165e 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -978,6 +978,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn, else if (!P && writeback) idx_mode = ARMII::IndexModePost; + if (writeback && (Rn == 15 || Rn == Rt)) return false; // UNPREDICTABLE + if (reg) { if (!DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)) return false; ARM_AM::ShiftOpc Opc = ARM_AM::lsl; -- cgit v1.2.3