From 03ab0bbb2411e7e87e078e35842e553f706e66dc Mon Sep 17 00:00:00 2001 From: David Goodwin Date: Wed, 8 Jul 2009 20:28:28 +0000 Subject: Generalize opcode selection in ARMBaseRegisterInfo. llvm-svn: 75036 --- llvm/lib/Target/ARM/Thumb2RegisterInfo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/Target/ARM/Thumb2RegisterInfo.h') diff --git a/llvm/lib/Target/ARM/Thumb2RegisterInfo.h b/llvm/lib/Target/ARM/Thumb2RegisterInfo.h index 15faa1ce067..c3635168978 100644 --- a/llvm/lib/Target/ARM/Thumb2RegisterInfo.h +++ b/llvm/lib/Target/ARM/Thumb2RegisterInfo.h @@ -31,7 +31,7 @@ public: /// specified immediate. void emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, - const TargetInstrInfo *TII, DebugLoc dl, + DebugLoc dl, unsigned DestReg, int Val, ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) const; -- cgit v1.2.3