From 780748d565b189968c172451d6bb843e673a887c Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 28 Jul 2009 05:48:47 +0000 Subject: - More refactoring. This gets rid of all of the getOpcode calls. - This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. llvm-svn: 77300 --- llvm/lib/Target/ARM/Thumb1RegisterInfo.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/ARM/Thumb1RegisterInfo.h') diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.h b/llvm/lib/Target/ARM/Thumb1RegisterInfo.h index ab01a264d3b..05b6ae9cef8 100644 --- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.h +++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.h @@ -51,8 +51,8 @@ public: // rewrite MI to access 'Offset' bytes from the FP. Return the offset that // could not be handled directly in MI. int rewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx, - unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc, - unsigned FrameReg, int Offset) const; + unsigned FrameReg, int Offset, + unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc) const; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS = NULL) const; -- cgit v1.2.3