From 523004145ec72d2fb7f75bb2560bf41a4362ed35 Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Wed, 24 Aug 2011 17:21:43 +0000 Subject: Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate. llvm-svn: 138443 --- llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp') diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index c4b2f613cc7..346bd2b04a4 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -228,6 +228,8 @@ static DecodeStatus DecodeThumbBCCTargetOperand(llvm::MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeThumbBLTargetOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeITCond(llvm::MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); #include "ARMGenDisassemblerTables.inc" #include "ARMGenInstrInfo.inc" @@ -3289,3 +3291,15 @@ static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn, return S; } +static DecodeStatus DecodeITCond(llvm::MCInst &Inst, unsigned Cond, + uint64_t Address, const void *Decoder) { + DecodeStatus S = Success; + if (Cond == 0xF) { + Cond = 0xE; + CHECK(S, Unpredictable); + } + + Inst.addOperand(MCOperand::CreateImm(Cond)); + return S; +} + -- cgit v1.2.3