From 3c11ecbbab6af2c0b04855018a3f97ccf45ca28d Mon Sep 17 00:00:00 2001 From: Oliver Stannard Date: Thu, 8 Feb 2018 14:21:28 +0000 Subject: Revert r324600 as it breaks a buildbot The broken bot (clang-ppc64le-linux-multistage) is doign a shared-object build, so I guess using lookupBankedRegByEncoding in the disassembler is a layering violation? llvm-svn: 324604 --- llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp') diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index f9a0a74bf8b..658a67511ff 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -4205,8 +4205,15 @@ static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val, // The table of encodings for these banked registers comes from B9.2.3 of the // ARM ARM. There are patterns, but nothing regular enough to make this logic // neater. So by fiat, these values are UNPREDICTABLE: - if (!ARMBankedReg::lookupBankedRegByEncoding((R << 5) | SysM)) - return MCDisassembler::Fail; + if (!R) { + if (SysM == 0x7 || SysM == 0xf || SysM == 0x18 || SysM == 0x19 || + SysM == 0x1a || SysM == 0x1b) + return MCDisassembler::SoftFail; + } else { + if (SysM != 0xe && SysM != 0x10 && SysM != 0x12 && SysM != 0x14 && + SysM != 0x16 && SysM != 0x1c && SysM != 0x1e) + return MCDisassembler::SoftFail; + } Inst.addOperand(MCOperand::createImm(Val)); return MCDisassembler::Success; -- cgit v1.2.3