From f86d1f0b7742806d5fe1469044e2a384a73057a0 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Mon, 7 Oct 2013 11:10:47 +0000 Subject: ARM: allow cortex-m0 to use hint instructions The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have been ported across to the v6M architecture. Fortunately, v6M seems to sit nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it fairly easily. rdar://problem/15144406 llvm-svn: 192097 --- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp') diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index f482912d27c..1e090d97dad 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -162,6 +162,9 @@ class ARMAsmParser : public MCTargetAsmParser { bool hasV6Ops() const { return STI.getFeatureBits() & ARM::HasV6Ops; } + bool hasV6MOps() const { + return STI.getFeatureBits() & ARM::HasV6MOps; + } bool hasV7Ops() const { return STI.getFeatureBits() & ARM::HasV7Ops; } @@ -4812,7 +4815,10 @@ getMnemonicAcceptInfo(StringRef Mnemonic, StringRef FullInst, Mnemonic != "stc2" && Mnemonic != "stc2l" && !Mnemonic.startswith("rfe") && !Mnemonic.startswith("srs"); } else if (isThumbOne()) { - CanAcceptPredicationCode = Mnemonic != "nop" && Mnemonic != "movs"; + if (hasV6MOps()) + CanAcceptPredicationCode = Mnemonic != "movs"; + else + CanAcceptPredicationCode = Mnemonic != "nop" && Mnemonic != "movs"; } else CanAcceptPredicationCode = true; } -- cgit v1.2.3