From f6419cfb143dc6fb4f5919ec74d65d187f6bbf7b Mon Sep 17 00:00:00 2001 From: James Molloy Date: Mon, 16 Jun 2014 16:42:53 +0000 Subject: Refactor the disabling of Thumb-1 LDM/STM generation Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself. No functionality change. llvm-svn: 211037 --- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp') diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index d1e7b4fcf5f..a93824230d7 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -203,8 +203,7 @@ bool ARMPassConfig::addInstSelector() { } bool ARMPassConfig::addPreRegAlloc() { - // FIXME: Temporarily disabling Thumb-1 pre-RA Load/Store optimization pass - if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only()) + if (getOptLevel() != CodeGenOpt::None) addPass(createARMLoadStoreOptimizationPass(true)); if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9()) addPass(createMLxExpansionPass()); @@ -219,11 +218,8 @@ bool ARMPassConfig::addPreRegAlloc() { bool ARMPassConfig::addPreSched2() { if (getOptLevel() != CodeGenOpt::None) { - // FIXME: Temporarily disabling Thumb-1 post-RA Load/Store optimization pass - if (!getARMSubtarget().isThumb1Only()) { - addPass(createARMLoadStoreOptimizationPass()); - printAndVerify("After ARM load / store optimizer"); - } + addPass(createARMLoadStoreOptimizationPass()); + printAndVerify("After ARM load / store optimizer"); if (getARMSubtarget().hasNEON()) addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass)); -- cgit v1.2.3