From a1189106d5a1b9e9ff57ea6fa53c24e891f1d09c Mon Sep 17 00:00:00 2001 From: Bradley Smith Date: Fri, 15 Jan 2016 10:26:17 +0000 Subject: [ARM] Add B.W and CBZ instructions to ARMv8-M Baseline llvm-svn: 257881 --- llvm/lib/Target/ARM/ARMSubtarget.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/Target/ARM/ARMSubtarget.cpp') diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index 2a94116a7e2..44bba0c3017 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -234,7 +234,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { // registers are the 4 used for parameters. We don't currently do this // case. - SupportsTailCall = !isThumb1Only(); + SupportsTailCall = !isThumb() || hasV8MBaselineOps(); if (isTargetMachO() && isTargetIOS() && getTargetTriple().isOSVersionLT(5, 0)) SupportsTailCall = false; -- cgit v1.2.3