From 55f1c09e31cfc6744fb682e17a2a1a00d914694c Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Thu, 13 Aug 2009 21:58:54 +0000 Subject: Push LLVMContexts through the IntegerType APIs. llvm-svn: 78948 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp') diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 11d4887e259..3c6778fe8cd 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -19,6 +19,7 @@ #include "ARMMachineFunctionInfo.h" #include "ARMRegisterInfo.h" #include "llvm/DerivedTypes.h" +#include "llvm/Function.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" @@ -1183,7 +1184,9 @@ ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, unsigned Align = Op0->memoperands_begin()->getAlignment(); unsigned ReqAlign = STI->hasV6Ops() - ? TD->getPrefTypeAlignment(Type::Int64Ty) : 8; // Pre-v6 need 8-byte align + ? TD->getPrefTypeAlignment( + Type::getInt64Ty(Op0->getParent()->getParent()->getFunction()->getContext())) + : 8; // Pre-v6 need 8-byte align if (Align < ReqAlign) return false; -- cgit v1.2.3