From a98c679de05bedf3bb1bf7574abd1a84ce5041b1 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 7 Jan 2008 01:56:04 +0000 Subject: Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674 --- llvm/lib/Target/ARM/ARMInstrInfo.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'llvm/lib/Target/ARM/ARMInstrInfo.cpp') diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp index f40be584eee..35226379e1c 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp @@ -63,7 +63,7 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI, return true; case ARM::MOVr: case ARM::tMOVr: - assert(MI.getInstrDescriptor()->numOperands >= 2 && + assert(MI.getDesc()->numOperands >= 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && "Invalid ARM MOV instruction"); @@ -180,7 +180,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, return NULL; MachineInstr *MI = MBBI; - unsigned TSFlags = MI->getInstrDescriptor()->TSFlags; + unsigned TSFlags = MI->getDesc()->TSFlags; bool isPre = false; switch ((TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift) { default: return NULL; @@ -200,7 +200,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, MachineInstr *UpdateMI = NULL; MachineInstr *MemMI = NULL; unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); - const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); + const TargetInstrDescriptor *TID = MI->getDesc(); unsigned NumOps = TID->numOperands; bool isLoad = TID->isSimpleLoad(); const MachineOperand &WB = isLoad ? MI->getOperand(1) : MI->getOperand(0); @@ -837,7 +837,7 @@ ARMInstrInfo::SubsumesPredicate(const std::vector &Pred1, bool ARMInstrInfo::DefinesPredicate(MachineInstr *MI, std::vector &Pred) const { - const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); + const TargetInstrDescriptor *TID = MI->getDesc(); if (!TID->ImplicitDefs && (TID->Flags & M_HAS_OPTIONAL_DEF) == 0) return false; @@ -870,7 +870,7 @@ unsigned ARM::GetInstSize(MachineInstr *MI) { const TargetAsmInfo *TAI = MF->getTarget().getTargetAsmInfo(); // Basic size info comes from the TSFlags field. - const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); + const TargetInstrDescriptor *TID = MI->getDesc(); unsigned TSFlags = TID->TSFlags; switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) { @@ -899,7 +899,7 @@ unsigned ARM::GetInstSize(MachineInstr *MI) { // jumptable. The size is 4 + 4 * number of entries. unsigned NumOps = TID->numOperands; MachineOperand JTOP = - MI->getOperand(NumOps - ((TID->Flags & M_PREDICABLE) ? 3 : 2)); + MI->getOperand(NumOps - (TID->isPredicable() ? 3 : 2)); unsigned JTI = JTOP.getIndex(); MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); const std::vector &JT = MJTI->getJumpTables(); -- cgit v1.2.3