From 8c41f99e6f175c156f1cdab4e9609ece39e2e141 Mon Sep 17 00:00:00 2001
From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Tue, 8 Aug 2006 20:35:03 +0000
Subject: change the addressing mode of the str instruction to reg+imm

llvm-svn: 29571
---
 llvm/lib/Target/ARM/ARMInstrInfo.cpp | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'llvm/lib/Target/ARM/ARMInstrInfo.cpp')

diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
index 5437c1dda10..4384c288966 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
@@ -22,6 +22,10 @@ ARMInstrInfo::ARMInstrInfo()
   : TargetInstrInfo(ARMInsts, sizeof(ARMInsts)/sizeof(ARMInsts[0])) {
 }
 
+const TargetRegisterClass *ARMInstrInfo::getPointerRegClass() const {
+  return &ARM::IntRegsRegClass;
+}
+
 /// Return true if the instruction is a register to register move and
 /// leave the source and dest operands in the passed parameters.
 ///
-- 
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