From 5e9e65e705d75d616c00fdcebe2b1e2ddb1956bf Mon Sep 17 00:00:00 2001 From: Manman Ren Date: Tue, 12 Jan 2016 00:47:18 +0000 Subject: CXX_FAST_TLS calling convention: performance improvement for ARM. This is the same change on ARM as r255821 on AArch64. rdar://9001553 llvm-svn: 257424 --- llvm/lib/Target/ARM/ARMCallingConv.td | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'llvm/lib/Target/ARM/ARMCallingConv.td') diff --git a/llvm/lib/Target/ARM/ARMCallingConv.td b/llvm/lib/Target/ARM/ARMCallingConv.td index e386a2e5cff..847ef87c1b2 100644 --- a/llvm/lib/Target/ARM/ARMCallingConv.td +++ b/llvm/lib/Target/ARM/ARMCallingConv.td @@ -234,6 +234,12 @@ def CSR_iOS_TLSCall : CalleeSavedRegs<(add LR, SP, def CSR_iOS_CXX_TLS : CalleeSavedRegs<(add CSR_iOS, (sequence "R%u", 12, 1), (sequence "D%u", 31, 0))>; +// CSRs that are handled by prologue, epilogue. +def CSR_iOS_CXX_TLS_PE : CalleeSavedRegs<(add LR)>; + +// CSRs that are handled explicitly via copies. +def CSR_iOS_CXX_TLS_ViaCopy : CalleeSavedRegs<(sub CSR_iOS_CXX_TLS, LR)>; + // The "interrupt" attribute is used to generate code that is acceptable in // exception-handlers of various kinds. It makes us use a different return // instruction (handled elsewhere) and affects which registers we must return to -- cgit v1.2.3