From 33d806a517994f8242f3fb1d35ad32f53604df61 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Wed, 24 Apr 2019 17:28:30 +0000 Subject: [AMDGPU] gfx1010 sgpr register changes Differential Revision: https://reviews.llvm.org/D61045 llvm-svn: 359117 --- llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/AMDGPU/Utils') diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp index d8db2b0277a..8b2e91a8ee3 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp @@ -22,7 +22,7 @@ const char* const IdSymbolic[] = { nullptr, nullptr, nullptr, - nullptr, + "MSG_GS_ALLOC_REQ", nullptr, nullptr, nullptr, @@ -68,7 +68,17 @@ const char* const IdSymbolic[] = { nullptr, nullptr, nullptr, - "HW_REG_SH_MEM_BASES" + "HW_REG_SH_MEM_BASES", + "HW_REG_TBA_LO", + "HW_REG_TBA_HI", + "HW_REG_TMA_LO", + "HW_REG_TMA_HI", + "HW_REG_FLAT_SCR_LO", + "HW_REG_FLAT_SCR_HI", + "HW_REG_XNACK_MASK", + nullptr, // HW_ID1, no predictable values + nullptr, // HW_ID2, no predictable values + "HW_REG_POPS_PACKER" }; } // namespace Hwreg -- cgit v1.2.3