From 46db60683422180688bff0737142c343ba28e7cb Mon Sep 17 00:00:00 2001 From: David Stuttard Date: Mon, 2 Dec 2019 13:01:26 +0000 Subject: AMDGPU: Avoid folding 2 constant operands into an SALU operation Summary: Catch the (admittedly unusual) case where SIFoldOperands attempts to fold 2 constant operands into the same SALU operation, with neither operand able to be encoded as an inline constant. Change-Id: Ibc48d662c9ffd8bbacd154976b0b1c257ace0927 Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70896 --- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'llvm/lib/Target/AMDGPU/SIFoldOperands.cpp') diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp index ca17ba8b722..f2c00ddce94 100644 --- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp +++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp @@ -429,6 +429,29 @@ static bool tryAddToFoldList(SmallVectorImpl &FoldList, return true; } + // Check the case where we might introduce a second constant operand to a + // scalar instruction + if (TII->isSALU(MI->getOpcode())) { + const MCInstrDesc &InstDesc = MI->getDesc(); + const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; + const SIRegisterInfo &SRI = TII->getRegisterInfo(); + + // Fine if the operand can be encoded as an inline constant + if (OpToFold->isImm()) { + if (!SRI.opCanUseInlineConstant(OpInfo.OperandType) || + !TII->isInlineConstant(*OpToFold, OpInfo)) { + // Otherwise check for another constant + for (unsigned i = 0, e = InstDesc.getNumOperands(); i != e; ++i) { + auto &Op = MI->getOperand(i); + if (OpNo != i && + TII->isLiteralConstantLike(Op, OpInfo)) { + return false; + } + } + } + } + } + appendFoldCandidate(FoldList, MI, OpNo, OpToFold); return true; } -- cgit v1.2.3