From 9ab812d4752b2a1442426db2ccc17dc95d12eb04 Mon Sep 17 00:00:00 2001 From: Ryan Taylor Date: Wed, 26 Jun 2019 17:34:57 +0000 Subject: [AMDGPU] Fix for branch offset hardware workaround Summary: This fixes a hardware bug that makes a branch offset of 0x3f unsafe. This replaces the 32 bit branch with offset 0x3f to a 64 bit instruction that includes the same 32 bit branch and the encoding for a s_nop 0 to follow. The relaxer than modifies the offsets accordingly. Change-Id: I10b7aed99d651f8159401b01bb421f105fa6288e Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63494 llvm-svn: 364451 --- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp') diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index 17222a77a0b..ea641017c80 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -261,6 +261,7 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, HasVcmpxExecWARHazard(false), HasLdsBranchVmemWARHazard(false), HasNSAtoVMEMBug(false), + HasOffset3fBug(false), HasFlatSegmentOffsetBug(false), FeatureDisable(false), -- cgit v1.2.3