From 3c7a123ccc943bb34a022c29ee31470876c01c6a Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Fri, 2 Mar 2018 01:22:06 +0000
Subject: AMDGPU/GlobalISel: Define instruction mapping for G_XOR

llvm-svn: 326524
---
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 +
 1 file changed, 1 insertion(+)

(limited to 'llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp')

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
index 8a145bd21ff..558d51da39f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -286,6 +286,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     return getInvalidInstructionMapping();
   case AMDGPU::G_AND:
   case AMDGPU::G_OR:
+  case AMDGPU::G_XOR:
     if (isSALUMapping(MI))
       return getDefaultMappingSOP(MI);
     return getDefaultMappingVOP(MI);
-- 
cgit v1.2.3