From 13d3371e687a44b4fd2d19107c95efdb3da9088c Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Fri, 9 Nov 2018 17:58:59 +0000 Subject: [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx This only covers AMDGPU BE, hopefully all occurrences. Differential Revision: https://reviews.llvm.org/D54235 llvm-svn: 346528 --- llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp') diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp index 995d9ae3907..5e0b7d42902 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp @@ -42,9 +42,12 @@ static bool shouldScheduleAdjacent(const TargetInstrInfo &TII_, if (!FirstMI) return true; + const MachineBasicBlock &MBB = *FirstMI->getParent(); + const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); + const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, AMDGPU::OpName::src2); - return FirstMI->definesRegister(Src2->getReg()); + return FirstMI->definesRegister(Src2->getReg(), TRI); } default: return false; -- cgit v1.2.3