From 6af73076505d9a845740c99b0fb89898dab36797 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Fri, 22 Jun 2018 03:04:35 +0000 Subject: AMDGPU/GlobalISel: Default to using TableGen'd instruction selector Summary: We can select all instructions that are marked as legal in a full piglit run, so now is a good time to make the TableGen'd instruction selector default for all opcodes. This is NFC for a full piglit run, which is why there are no tests. Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D48198 llvm-svn: 335319 --- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 7 ------- 1 file changed, 7 deletions(-) (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp') diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp index 80a1bc9fe17..80f062b7daa 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp @@ -536,13 +536,6 @@ bool AMDGPUInstructionSelector::select(MachineInstr &I, switch (I.getOpcode()) { default: - break; - case TargetOpcode::G_ASHR: - case TargetOpcode::G_SITOFP: - case TargetOpcode::G_FMUL: - case TargetOpcode::G_FADD: - case TargetOpcode::G_FPTOUI: - case TargetOpcode::G_OR: return selectImpl(I, CoverageInfo); case TargetOpcode::G_ADD: return selectG_ADD(I); -- cgit v1.2.3