From 76e555798156a722838f7e0c0bad3690d4717982 Mon Sep 17 00:00:00 2001 From: Quentin Colombet Date: Thu, 3 Oct 2013 17:51:49 +0000 Subject: [llvm-c][Disassembler] When printing latency information, fall back to the itinerary model in case the target does not supply a scheduling model. By doing this, targets like cortex-a8 can benefit from the latency printing feature added in r191859. This part of . llvm-svn: 191916 --- llvm/lib/MC/MCDisassembler/Disassembler.cpp | 31 ++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) (limited to 'llvm/lib/MC/MCDisassembler/Disassembler.cpp') diff --git a/llvm/lib/MC/MCDisassembler/Disassembler.cpp b/llvm/lib/MC/MCDisassembler/Disassembler.cpp index 115af8d45b7..a0066c8885c 100644 --- a/llvm/lib/MC/MCDisassembler/Disassembler.cpp +++ b/llvm/lib/MC/MCDisassembler/Disassembler.cpp @@ -102,6 +102,7 @@ LLVMDisasmContextRef LLVMCreateDisasmCPU(const char *Triple, const char *CPU, if (!DC) return 0; + DC->setCPU(CPU); return DC; } @@ -174,6 +175,32 @@ static void emitComments(LLVMDisasmContext *DC, DC->CommentStream.resync(); } +/// \brief Gets latency information for \p Inst form the itinerary +/// scheduling model, based on \p DC information. +/// \return The maximum expected latency over all the operands or -1 +/// if no information are available. +static int getItineraryLatency(LLVMDisasmContext *DC, const MCInst &Inst) { + const int NoInformationAvailable = -1; + + // Check if we have a CPU to get the itinerary information. + if (DC->getCPU().empty()) + return NoInformationAvailable; + + // Get itinerary information. + const MCSubtargetInfo *STI = DC->getSubtargetInfo(); + InstrItineraryData IID = STI->getInstrItineraryForCPU(DC->getCPU()); + // Get the scheduling class of the requested instruction. + const MCInstrDesc& Desc = DC->getInstrInfo()->get(Inst.getOpcode()); + unsigned SCClass = Desc.getSchedClass(); + + int Latency = 0; + for (unsigned OpIdx = 0, OpIdxEnd = Inst.getNumOperands(); OpIdx != OpIdxEnd; + ++OpIdx) + Latency = std::max(Latency, IID.getOperandCycle(SCClass, OpIdx)); + + return Latency; +} + /// \brief Gets latency information for \p Inst, based on \p DC information. /// \return The maximum expected latency over all the definitions or -1 /// if no information are available. @@ -185,7 +212,9 @@ static int getLatency(LLVMDisasmContext *DC, const MCInst &Inst) { // Check if we have a scheduling model for instructions. if (!SCModel || !SCModel->hasInstrSchedModel()) - return NoInformationAvailable; + // Try to fall back to the itinerary model if we do not have a + // scheduling model. + return getItineraryLatency(DC, Inst); // Get the scheduling class of the requested instruction. const MCInstrDesc& Desc = DC->getInstrInfo()->get(Inst.getOpcode()); -- cgit v1.2.3