From f736bd9c79f22e7c28d1ffc9b7c2db62e2055876 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Mon, 9 Feb 2009 08:45:39 +0000 Subject: Re-enable machine sinking pass now that the coalescer bugs and the AnalyzeBrnach bug are fixed. llvm-svn: 64126 --- llvm/lib/CodeGen/LLVMTargetMachine.cpp | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) (limited to 'llvm/lib/CodeGen') diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp index 7def8fa61d2..f29944c7c90 100644 --- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp +++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp @@ -38,11 +38,6 @@ static cl::opt PrintEmittedAsm("print-emitted-asm", cl::Hidden, static cl::opt PrintGCInfo("print-gc", cl::Hidden, cl::desc("Dump garbage collector data")); -// Hidden options to help debugging -static cl::opt -EnableSinking("enable-sinking", cl::init(false), cl::Hidden, - cl::desc("Perform sinking on machine code")); - // When this works it will be on by default. static cl::opt DisablePostRAScheduler("disable-post-RA-scheduler", @@ -183,11 +178,10 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (!Fast) + if (!Fast) { PM.add(createMachineLICMPass()); - - if (EnableSinking) PM.add(createMachineSinkingPass()); + } // Run pre-ra passes. if (addPreRegAlloc(PM, Fast) && PrintMachineCode) -- cgit v1.2.3