From ce72d611af0114d0a6a39f06960d5b75e90a2dd0 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Mon, 16 Oct 2017 02:15:39 +0000 Subject: Revert r315885: [globalisel][tblgen] Add support for iPTR and implement am_unscaled* and am_indexed* MSVC doesn't like one of the constructors. llvm-svn: 315886 --- llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'llvm/lib/CodeGen') diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp index 2a563c9bf5c..e4ee2bb7cf4 100644 --- a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp +++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp @@ -18,7 +18,6 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineOperand.h" -#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/MC/MCInstrDesc.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" @@ -99,23 +98,6 @@ bool InstructionSelector::isOperandImmEqual( return false; } -bool InstructionSelector::isBaseWithConstantOffset( - const MachineOperand &Root, const MachineRegisterInfo &MRI) const { - if (!Root.isReg()) - return false; - - MachineInstr *RootI = MRI.getVRegDef(Root.getReg()); - if (RootI->getOpcode() != TargetOpcode::G_GEP) - return false; - - MachineOperand &RHS = RootI->getOperand(2); - MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg()); - if (RHSI->getOpcode() != TargetOpcode::G_CONSTANT) - return false; - - return true; -} - bool InstructionSelector::isObviouslySafeToFold(MachineInstr &MI) const { return !MI.mayLoadOrStore() && !MI.hasUnmodeledSideEffects() && MI.implicit_operands().begin() == MI.implicit_operands().end(); -- cgit v1.2.3