From b109d51865e5aeae8ca2e9b1e62f56d80a5b3ad1 Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Tue, 2 Aug 2016 16:49:19 +0000 Subject: [GlobalISel] Add Selected MachineFunction property. Selected: the InstructionSelect pass ran and all pre-isel generic instructions have been eliminated; i.e., all instructions are now target-specific or non-pre-isel generic instructions (e.g., COPY). Since only pre-isel generic instructions can have generic virtual register operands, this also means that all generic virtual registers have been constrained to virtual registers (assigned to register classes) and that all sizes attached to them have been eliminated. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277482 --- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 2 ++ llvm/lib/CodeGen/MIRPrinter.cpp | 2 ++ llvm/lib/CodeGen/MachineFunction.cpp | 3 +++ 3 files changed, 7 insertions(+) (limited to 'llvm/lib/CodeGen') diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp index fcec6deb100..7c460b60ac6 100644 --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -298,6 +298,8 @@ bool MIRParserImpl::initializeMachineFunction(MachineFunction &MF) { if (YamlMF.RegBankSelected) MF.getProperties().set( MachineFunctionProperties::Property::RegBankSelected); + if (YamlMF.Selected) + MF.getProperties().set(MachineFunctionProperties::Property::Selected); PerFunctionMIParsingState PFS(MF, SM, IRSlots); if (initializeRegisterInfo(PFS, YamlMF)) diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index d08feec0046..d66ac0153c2 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -182,6 +182,8 @@ void MIRPrinter::print(const MachineFunction &MF) { MachineFunctionProperties::Property::Legalized); YamlMF.RegBankSelected = MF.getProperties().hasProperty( MachineFunctionProperties::Property::RegBankSelected); + YamlMF.Selected = MF.getProperties().hasProperty( + MachineFunctionProperties::Property::Selected); convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo()); ModuleSlotTracker MST(MF.getFunction()->getParent()); diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index 6cd3b65b294..c84faafaa48 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -82,6 +82,9 @@ void MachineFunctionProperties::print(raw_ostream &ROS, bool OnlySet) const { case Property::RegBankSelected: ROS << (HasProperty ? "" : "not ") << "RegBank-selected"; break; + case Property::Selected: + ROS << (HasProperty ? "" : "not ") << "selected"; + break; default: break; } -- cgit v1.2.3