From 38a6fbf933e707e02ac9fc5a6326fc3b4d27266a Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 15 Jun 2012 23:48:48 +0000 Subject: Remove final verification in RABasic. We now have a proper machine code verifier pass between register allocation and rewriting. llvm-svn: 158577 --- llvm/lib/CodeGen/RegAllocBasic.cpp | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'llvm/lib/CodeGen') diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp index 6d0648043ad..1fa54cd7484 100644 --- a/llvm/lib/CodeGen/RegAllocBasic.cpp +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp @@ -314,26 +314,6 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) { // optional HTML output DEBUG(RMF->renderMachineFunction("After basic register allocation.", VRM)); - // FIXME: Verification currently must run before VirtRegRewriter. We should - // make the rewriter a separate pass and override verifyAnalysis instead. When - // that happens, verification naturally falls under VerifyMachineCode. -#ifndef NDEBUG - if (VerifyEnabled) { - // Verify accuracy of LiveIntervals. The standard machine code verifier - // ensures that each LiveIntervals covers all uses of the virtual reg. - - // FIXME: MachineVerifier is badly broken when using the standard - // spiller. Always use -spiller=inline with -verify-regalloc. Even with the - // inline spiller, some tests fail to verify because the coalescer does not - // always generate verifiable code. - MF->verify(this, "In RABasic::verify"); - - // Verify that LiveIntervals are partitioned into unions and disjoint within - // the unions. - verify(); - } -#endif // !NDEBUG - releaseMemory(); return true; } -- cgit v1.2.3