From 4a9a4e198f666330690f524d3109e08471c606f6 Mon Sep 17 00:00:00 2001 From: MinSeong Kim Date: Tue, 5 Jan 2016 14:50:15 +0000 Subject: [MISched] Explanatory error message when machine model is not complete. NFC When not all instructions have a scheduling class, the error message now provides a possible solution. Differential Revision: http://reviews.llvm.org/D15854 llvm-svn: 256839 --- llvm/lib/CodeGen/TargetSchedule.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/CodeGen/TargetSchedule.cpp') diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp index fc656396ade..1c4558cea5f 100644 --- a/llvm/lib/CodeGen/TargetSchedule.cpp +++ b/llvm/lib/CodeGen/TargetSchedule.cpp @@ -212,7 +212,7 @@ unsigned TargetSchedModel::computeOperandLatency( && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() && SchedModel.isComplete()) { errs() << "DefIdx " << DefIdx << " exceeds machine model writes for " - << *DefMI; + << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)"; llvm_unreachable("incomplete machine model"); } #endif -- cgit v1.2.3