From 2133d3c5586b1a782e4d8e2a34c9f501499705cf Mon Sep 17 00:00:00 2001 From: QingShan Zhang Date: Fri, 3 Jan 2020 03:26:41 +0000 Subject: [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal' For now, we didn't set the default operation action for SIGN_EXTEND_INREG for vector type, which is 0 by default, that is legal. However, most target didn't have native instructions to support this opcode. It should be set as expand by default, as what we did for ANY_EXTEND_VECTOR_INREG. Differential Revision: https://reviews.llvm.org/D70000 --- llvm/lib/CodeGen/TargetLoweringBase.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp') diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index 5f89f49009b..9198ae07c00 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -696,6 +696,7 @@ void TargetLoweringBase::initActions() { // These operations default to expand for vector types. if (VT.isVector()) { setOperationAction(ISD::FCOPYSIGN, VT, Expand); + setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand); setOperationAction(ISD::ANY_EXTEND_VECTOR_INREG, VT, Expand); setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, VT, Expand); setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, VT, Expand); -- cgit v1.2.3